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Method of fabricating polysilicon structures with different resistance values for gate electrodes, resistors and capacitor plates in an integrated circuit

US 6,162,584 A · Assignee: Taiwan Semiconductor Manufacturing Company · Inventors: Chen; Sen-Fu et al.

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Listed from its USPTO record in Patent Yard's full-term archive. Its claims, description and drawings are in the USPTO PDF and on Google Patents, and the Claude kit works from them.

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Why it's free to use

  • Filed May 7, 1998. A US utility patent lasts 20 years from filing, so its term ended May 7, 2018.
  • Patents filed before May 29, 2000 can't get a term adjustment for USPTO delays, and any other extension is capped at five years, so it can't still be in force.
  • We haven't checked its US family, and a later related patent could still be in force. We check US rights only.
FiledMay 7, 1998
GrantedDecember 19, 2000
Term endedMay 7, 2018
Application number09/073948
Classification (CPC)H10D1/47 +2 more
Length13 pages

Timeline

Timeline From USPTO dates

1999200120032005200720092011201320152017Application filedMay 7, 1998Patent grantedDec 19, 2000Term endedMay 7, 2018

Sources & verification

Official USPTO records

Full published documentText and every drawing sheet as a PDF.USPTOFile historyStatus, office actions, notices, fee records and petitions.USPTO Patent CenterPatent Public Search recordSearchable full text and bibliographic data.USPTO

Cross-check elsewhere

Google PatentsFull text, worldwide family, citing patents and legal events.patents.google.comJustia PatentsFull text, claims and classification.patents.justia.comFreePatentsOnlineFull text and PDF.freepatentsonline.comEspacenetForeign family and legal status.European Patent Office

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