Delay lock loops for wireless communication systems

Abstract From the Canadian patent

Techniques for deriving sample timing for multiple signal instances received on multiple antennas for a given propagation path. In one scheme a DLL is maintained for each path, and each DLL tracks the timing of the best signal instance for the assigned path. In another scheme a DLL is maintained for each path, and each DLL tracks the average timing of the multiple signal instances for the assigned path. To reduce timing jitter the SINR of a signal instance may be estimated for a number of different time offsets. The loop filter for the DLL is initially updated in the normal manner. If a change in the time offset used for the sample timing is detected then the SINRs for the new and prior …