Debugging port security interface
CA 2536610 C · Owner: Randell, Jerrold R. · Inventors: Little, Herbert A.; Randell, Jerrold R.; Hickey, Ryan J.
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
The present invention provides a secure JTAG interface to an applicationspecific integrated circuit (ASIC). In the preferred embodiment the invention operates through the combined efforts of a Security Module (SM) comprising a state machine that controls the security modes for the ASIC and a Test , Control Module (TCM) which contains the JTAG interface. The TCM operates in either a restricted mode or an unrestricted mode depending on the state of , the SM state machine. In a restricted mode only limited access to memory , content is permitted. In an unrestricted mode full access to memory content , is permitted.
Read the whole patent
Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Filed February 4, 2005 and granted April 30, 2013. A Canadian patent filed from October 1, 1989 lasts 20 years from filing, so its term ended February 4, 2025.
- Certificates of supplementary protection extend only drug patents, and it isn't classified as one.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.