A flash memory architecture with page mode erase using nmos and pmos row decoding scheme
CA 2500798 A1 · Owner: Caser, Fabio Tassan · Inventors: Bartoli, Simone; Caser, Fabio Tassan; Bedarida, Lorenzo
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
A flash memory has a new page erase architecture using a local decoding scheme instead of the global decoding scheme known in the prior art. The new architecture saves more die area for memory cells and prevents unwanted erasure without affecting the reading time. Under the local decoding scheme the flash memory is partitioned into sectors (222; 804). Each sector comprises a plurality of local decoders (202) and local circuitry. The local circuitry comprises switches (302, 304, 306) controlled by the global decoders (802) and these switches switch only in erase operation and not read operation. The reading time is not affected. Each local decoder is coupled to a row (212) of the …
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Filed September 4, 2003. No grant is recorded for it in Canada; had it been granted, its 20-year term would have ended September 4, 2023.
- A certificate of supplementary protection adds at most two years for a drug, so even that would have ended by September 4, 2025.
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Timeline
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Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.