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Canadian application, no grantCanada

Peripheral component interconnect bus memory address decoding

CA 2371509 A1 · Owner: Thales Training & Simulation Limited · Inventors: White, David John; Ball, Alan Edward

CIPO record

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Its claims, description and drawings are in the Canadian Patents Database.

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Abstract From the Canadian patent

A peripheral component interconnect (PCI) bus memory addressing system comprising a memory address decoder and disconnection means connected to a PCI bus, the disconnection means being arranged to disconnect one or more signals of the, PCI bus from a first PCI device wherein the memory address decoder is arranged to, selectively activate the disconnection means such that an address which falls within an, address range identified in a base address register of the first PCI device and a base, address register of a second PCI device will be received by the second PCI device but, not by the first PCI device.

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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.

Why it's free to use

  • Filed February 12, 2002. No grant is recorded for it in Canada; had it been granted, its 20-year term would have ended February 12, 2022.
  • A certificate of supplementary protection adds at most two years for a drug, so even that would have ended by February 12, 2024.
  • We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
FiledFebruary 12, 2002
GrantedNo grant recorded
Term endedFebruary 12, 2022
Patent numberCA 2371509 A1
Classification (IPC)G06F13/16 +2 more

Timeline

Timeline From CIPO dates

2003200520072009201120132015201720192021Application filedFeb 12, 2002Term endedFeb 12, 2022

Sources & verification

Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.