Gate biasing arrangement
CA 2359679 A1 · Owner: Af Ekenstam, Nils · Inventors: Sjoden, Henrik; Af Ekenstam, Nils; Johansson, Jan
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
To eliminate the temperature dependency of the quiescent current of a power transistor (1), the gate bias voltage of the power transistor (1) is controlled by means of the output voltage of a biasing transistor (3) residing on the same silicon chip as the power transistor (1) and by interconnecting , the gate (G3) and drain (D3) of the biasing transistor (3) and feeding it with a constant current (IB) from external circuitry.
Read the whole patent
Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Filed December 30, 1999. No grant is recorded for it in Canada; had it been granted, its 20-year term would have ended December 30, 2019.
- A certificate of supplementary protection adds at most two years for a drug, so even that would have ended by December 30, 2021.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.