Method of testing at-speed circuits having asynchronous clocks and controller for use therewith

Abstract From the Canadian patent

A method of testing the care logic in a digital system the method having a, sequence of test operations including a shift-in operation in which a test stimulus is, shifted into scanable memory elements in the core logic a capture operation , in, which data in the memory elements is captured and a shift-out operation in , which, captured data is shifted out of the core logic for analysis comprises the , improvement, of, for each the test operation concurrently enabling the domain clock of each clock, domain in the core logic at the beginning of each test operation performing , the test, operation in each domain and disabling the domain clock at the end of each test, operation in each …