Method of forming power semiconductor devices with controllable integrated buffer
CA 2213840 A1 · Owner: Bhalla, Anup · Inventors: Yedniak, Joseph A.; Bhalla, Anup; Cumbo, Joseph L.
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
A method of manufacturing a semiconductor device and device in which a sacrificial N shelf layer is grown on a P+ semiconductor substrate to contain the out-diffusion of dopant from the substrate. An N + buffer layer is grown on the N shelf layer and an N- epitaxial layer is grown on the N + buffer layer. The presence of the N shelf layer, which is consumed by the substrate dopant during further device fabrication, allows the integrated dopant level of the N + buffer layer to be accurately controlled in the finished device.
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Filed August 25, 1997. No grant is recorded for it in Canada; had it been granted, its 20-year term would have ended August 25, 2017.
- A certificate of supplementary protection adds at most two years for a drug, so even that would have ended by August 25, 2019.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.