Clocking unit for digital data processing

Abstract From the Canadian patent

A technique for generating gated clock signals for use in enabling various operating gating units in a data processing system in which an internal reference clock signal is used to generate both processor clock signals and the gated clock signals such that the latter signals are substantially synchronous with the processor clock signals. D-flip-flop circuitry together with a delay unit having an adjustable time delay are used to generate a gated clock signal. The overall time delay from the time of, which the circuitry is enabled until the gated clock signal is produced, is appropriately set by selecting the required time delay so that the overall time delay is essentially the same as the …