Switched capacitor circuit having reduced capacitance units

Abstract From the Canadian patent

A switched capacitor circuit includes a first capacitor connected between first and second nodes, a second capacitor connected between the first node and an intermediate node, and a third capacitor connected between the intermediate node and ground. A group of m parallel circuits are connected between the intermediate node and the second node. Each of the m parallel circuits has a fourth capacitor and a switch for coupling it to ground or to the second node depending on a corresponding one of m bits of a N-bit gain control signal. (N-m)parallel circuits are connected between the first and second nodes each including, a fifth capacitor and a switch for charging it depending on one of (N-m) …