Apparatus for and method of synchronizing a clock signal

Abstract From the Canadian patent

The present disclosure includes a discussion of a method of synchronizing a sampling clock signal to a received data signal (131). The clock recovery circuit (127) generates several clock signals (339 341 343, 345) at the symbol rate, with each clock signal having a unique phase. To permit fast initial acquisition the set of clock signals includes a pair of clocks which differ in phase by one-half of a symbol interval. Additionally the clock recovery circuitry (127) generates error signals (347 349 351 353), representing the difference between the phase of the received data signal and the phase of each clock signal. The error signals (347, 349, 351, 353) are processed over multiple symbol …