High speed data detection and clock recovery in a received multi-level data signal

Abstract From the Canadian patent

An arrangement for high speed data detection and clock recovery in a multilevel data signal is disclosed wherein the received signal waveform is sampled at periodic preselected locations (Fig.1) and the samples so obtained are compared to set values representing the expected levels at those locations (D0 D1-D16). If within a permitted tolerance range (30) over a given window of time, an indication of the presence of data is determined. Further if such correlation is determined to occur at a periodic rate, symbol timing (clock) recovery is also indicated (42 44, 51-54). A further embodiment with a dual recovery capability is also disclosed and described.