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Expired Canadian patentCanada

Overflow detection system and its circuit for use in addition and subtraction

CA 2072265 C · Owner: Nec Corporation · Inventors: Suzuki, Kazumasa

CIPO record

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Abstract From the Canadian patent

In an overflow detection circuit for A+B operation an inverter outputs a value V B, comprising inverted bits of a numeric part of an addend B. A comparator receives as an input a numeric part V A of an augend A and an output V B of, the inventer, and responsive thereto outputs a signal C indicating whether or not V A > V B, is given. Sign parts S A and S B of A and B and the output C of the comparator are inputted into a decoder and an overflow signal "0" is outputted. The decoder is a circuit which outputs "1" when S A and S B are "0" and V A(V A > V B') is large and when S A and S B are "1" and V A is small (VA=V B'), and output "0" in other cases. If the comparator is a circuit for …

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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.

Why it's free to use

  • Filed June 25, 1992 and granted December 16, 1997. A Canadian patent filed from October 1, 1989 lasts 20 years from filing, so its term ended June 25, 2012.
  • A certificate of supplementary protection adds at most two years for a drug, so even that would have ended by June 25, 2014.
  • We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
FiledJune 25, 1992
GrantedDecember 16, 1997
Term endedJune 25, 2012
Patent numberCA 2072265 C
Classification (IPC)G06F7/50 +1 more

Timeline

Timeline From CIPO dates

1993199519971999200120032005200720092011Application filedJune 25, 1992Patent grantedDec 16, 1997Term endedJune 25, 2012

Sources & verification

Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.