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Canadian application, no grantCanada

Unused address bit based wait state selection circuit

CA 2054009 A1 · Owner: Grieff, Thomas W. · Inventors: Grieff, Thomas W.

CIPO record

Overview

Drawings and full text

Its claims, description and drawings are in the Canadian Patents Database.

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Abstract From the Canadian patent

A circuit for providing wait states using address bits not used in the device address decode. The various addresses memory and peripheral devices do not utilize the enter address space and so address bits are not utilized. A number of the unused bits are decoded to determine the number of wait states to be developed in the operation. The address decode based wait state determination is overridden for RAM operations but, followed for ROM and peripheral operations.

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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.

Why it's free to use

  • Filed October 23, 1991. No grant is recorded for it in Canada; had it been granted, its 20-year term would have ended October 23, 2011.
  • A certificate of supplementary protection adds at most two years for a drug, so even that would have ended by October 23, 2013.
  • We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
FiledOctober 23, 1991
GrantedNo grant recorded
Term endedOctober 23, 2011
Patent numberCA 2054009 A1
Classification (IPC)G06F9/30 +1 more

Timeline

Timeline From CIPO dates

1992199419961998200020022004200620082010Application filedOct 23, 1991Term endedOct 23, 2011

Sources & verification

Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.