Single transistor non-volatile electrically alterable semiconductor memory device with a re-crystallized floating gate

Abstract From the Canadian patent

A single transistor electrically, programmable and erasable memory cell (10) has a substrate (12) of a semiconductor material of a first-conductivity type (18). Within the substrate are defined source (16), drain (14), regions with a channel region (18) therebe-, tween. A first insulating layer (20) is disposed over the subtract (12) and over the source (16) channel (18) and drain (14) regions. An electrically conductive re-crystallized floating gate (22) is disposed over the first-insulating layer (20) and extends over a portion of the channel region (18) and over a portion of the drain region (14) to maximize capaci-, tive coupling therewith. A second insulating layer (25) has a top wall …