Bit synchronizer for short duration burst communications

Abstract From the Canadian patent

In order to rapidly acquire and track a clock signal embedded in a reduced length synchronization preamble a bit, synchronizer contains a digital counter which counts clock, signals from a local clock generator having a frequency that is a multiple of the frequency of the data modulations in the received signal. The inverse of the most significant bit output of the counter sources the regenerated clock signal. In response to transitions in the monitored signal, the contents of the counter are coupled to an accumulator to provide successive measures of the (phase) difference between the times of occurrence of the regenerated clock signal and the actual times of occurrence of the sync …