P-type buffer layers for integrated circuits

Abstract From the Canadian patent

Abstract of the Disclosure, An integrated circuit having an epitaxial GaAs buffer layer containing p-type dopant is disclosed. The epitaxial p-doped buffer has a lower point defect/impurity density than bulk, melt-grown GaAs buffer layers and a lower carrier mobility than comparable n-doped buffer layers, and forms p-n junctions with n-doped regions of transistors resident on the buffer layer. The buffer substantially reduces interdevice and intradevice parasitic currents as well as sidegating and backgating. Furthermore, the p-doped epitaxial buffer enhances device isolation.