High bandwidth reed-solomon encoding, decoding and error correcting circuit

Abstract From the Canadian patent

A pipelined error correction circuit iteratively determines syndromes, error locator and evaluator equations and, error locations and associated error values for received Reed- Solomon code words. The circuit includes a plurality of Galois Field multiplying circuits which use a minimum number of circuit elements to generate first and second products. Each Galois Field multiplying circuit includes a first GE multiplier which multiplies one of two input signals in each of two time intervals by a first value to produce a first product. The circuit includes a second GF multiplier which further multiplies one of the first products by a second value to generate a second product. The first and …