Method and apparatus for assuring adequate access to system resources byprocessors in a multiprocessor computer system

Abstract From the Canadian patent

A multiple node computer system includes processor nodes, memory nodes, and input/output nodes interconnected on a pended bus. The system includes a lockout indicator which is set upon receipt of a locked response message by a processor node from a memory node in response to an interlock read command. The processors include a lockout check circuit responsive to the condition of the lockout indicator and will restrict generation of additional interlock read commands according to a predetermined access gating criterion until the lockout indicator is reset. In this manner processor nodes of, the system are assured equitable access to a memory node.