Fast frequency settling signal generator utilizing a frequency locked-loop

Abstract From the Canadian patent

Signal generating apparatus including a phaselocked loop (PLL) utilizing a voltage-controlled oscillator (VCO) and a frequency-locked loop (FLL) to generate an output signal whose frequency jumps from one value to another in a selectable sequence. The signal generator further includes a delay line discriminator to provide an error signal to compensate for FM noise in the VCO. The frequency-locked loop is implemented by utilizing the FM error signal from the delay line discriminator to stabilize the center frequency of the VCO. The inherent wide bandwidth of the FLL provides a fast settling time when the loop is switched to a new frequency. In a learn mode, the gain parameters of the loop …