Phase-locked loop clock

Abstract From the Canadian patent

Abstract of the Disclosure There is provided a phase-locked loop clock circuit being operable in a tracking mode in response to a reference signal and in a sustaining mode in the absence of a reference signal. The circuit provides a relatively stable output clock signal in either of the two modes and permits smooth switchovers from one reference signal to another in a system with multiple reference signals. The circuit further provides a stable output clock if a reference signal temporarily fails. - i -