Fault detection circuit capable of detecting burst errors in an lru memory

Abstract From the Canadian patent

NE-141, "Fault Detection Circuit Capable of Detecting Burst Errors in an LRU Memory" ABSTRACT OF THE DISCLOSURE, A fault detection circuit comprises an LRU memory having a series of bit storage cells for storing data bits therein the, stored bits indicating relationships between most recently referenced timings for each of address levels. Updating input data bits are generated by an LRU update logic in response to the LRU memory being accessed from an external source and applying the generated updating input data bits to the LRU memory to cause same to generate updated output data bits. One of the updating input data bits is inverted prior to application to the LRU memory. An error …