Digital phase-locked device and method

Abstract From the Canadian patent

An improved digital phase-locked device and method for synchronizing incoming data (8) with a local clock (24) includes registers (12a,12b) which, when alternately triggered during each successive selection cycle, trap the states of waveforms supplied by a delay element string (11). A transition detector (13) detects transitions in these waveforms and provides to a selection means (17, 18, 19) a plurality of outputs each, corresponding directly to a respective clock position. Registers 19a, 19b, of the selection means are alternately triggered by clock signals. Selection means 19 provides a window (SW) defining the maximum number of unique clock positions adjacent a then present clock …