High speed low pin count bus interface
CA 1297197 C · Owner: Donaldson, Darrel D. · Inventors: Donaldson, Darrel D.; Gillett, Richard B. Jr.; Williams, Douglas D.
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
Bus interface apparatus is provided to drive a high speed bus with two nonoverlapping clock signals. The apparatus takes advantage of the inherent bus capacitance which will temporarily hold data signals placed on the bus by using bus interface circuitry having high input and output impedances. That circuitry can thus be activated by coincident signals.
Read the whole patent
Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted March 10, 1992. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended March 10, 2009.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.