Semiconductor memory comprising trench capacitor

Abstract From the Canadian patent

In a three-dimensional, one-transistor cell arrangement for dynamic semiconductor memories, whereby the capacitor for the charges to be stored is fashioned as a trench capacitor in the substrate and, separated by an insulating layer is arranged, under the selection transistor comprising an insulated gate electrode and is connected to the source/drain zone thereof in electrically conductive fashion, and whereby the source/drain zones of the selection transistor are contained in a recrystallized silicon layer applied above the insulating layer the electrically conductive contact -to the capacitor is formed by an asymmetrical trench expansion introduced into the substrate in the upper part of …