Double-buffered time division switching system
CA 1292334 C · Owner: Kobayashi, Tsuneo · Inventors: Kobayashi, Tsuneo
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
There is described an improved double-buffered time division switching system comprising first and second kbit x N-multiplex memory switches, into whose N time slots per frame are sequantially inputted time division multiplexed data and either of which is placed in a write state. A control memory is provided for storing the read sequence of data in the first and second memory switches. First and second multi-element information memories store multi-element information which indicates corresponding, to a plurality of input time slots constituting a series of data in the frame, that these time slots are multielement data. A first controller checks the first multielement information memory in …
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted November 19, 1991. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended November 19, 2008.
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Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.