Architecture and device for testable mixed analog and digital vlsi circuits

Abstract From the Canadian patent

An architecture and device for testing mixed analog and digital VLSI circuits, wherein the digital circuit portions of the chip are grouped into a digital block, and the analog circuit portions of the chip are grouped into an analog block. Analog signals are provided to the digital block through an A/D transducer and digital signals are provided to the analog block through a D/A transducer. The analog and digital blocks may be isolated from each other by a digital input multiplexer disposed between the A/D transducer and the digital block, and by an analog input multiplexer disposed between the D/A transducer and the analog block. To minimize the number of pins required to implement the …