Mos memory cell with exponentially-profiled doping and offset floating gate tunnel oxidation

Abstract From the Canadian patent

A semiconductor memory device having a CMOS memory cell with a floating gate and increasing concentration of dopant in, the source drain and, channel regions. Typically the concentration profile is generally exponential. The device has relatively high diffusion current densities accelerated toward the surface and directed toward the channel/drain interface. Gate oxidation thickness is reduced over the channel near the drain to create a tunnel "window" in the area of greatest electric field magnitude. The device provides for significantly reduced write times as compared to conventional devices.