Data error detection circuit
CA 1285074 C · Owner: Koshikawa, Joutarou · Inventors: Koshikawa, Joutarou; Irie, Toshio; Watanabe, Tomoharu
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
A data error detection circuit which detects error of high speed universal data formed by repeating low speed data frame a number of times at a high speed. The invention involves converting the input high speed universal data into parallel data from serial data, outputting in parallel the same bits of a repeated data frame, and detecting data error in the case where a continuous non-coincidence of such parallel output data exceeds a specified number of times is detected. This discriminates data error from changes resulting from partition in the repetition of the data.
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted June 18, 1991. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended June 18, 2008.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.