Multiple-redundant fault detection system and related method for its use

Abstract From the Canadian patent

A multiple-redundant computer system having multiple computational devices (40a, 40b 40c) opera-, ting in synchronism, multiple voter circuits (30a 30b, 30c) to provide voted memory reading operations for the devices, and multiple fault detection logic (44a, 44b, 44c) for the detection of failures of the computational devices. Fault status words generated by the fault detection logic are also subject to a voted read by the multiple computational devices thereby permitting detection of errors in the fault detection logic itself, as well as in the computational devices. The module structure of the invention also permits removal and replacement of circuit modules, each including a …