Column redundancy for two port random access memory

Abstract From the Canadian patent

A memory system includes a data storage matrix having columns and rows and a redundant storage matrix having at least one column. The columns of the storage matrix are addressed by column addresses each defining a logical column address for a data bit of a row and corresponding to a predetermined physical column of the storage matrix. The storage matrix is readable in parallel, the parallel read data being serially presented to an output port in a sequence determined by the physical order of the columns of the storage matrix. Column redundancy logic response, to a column address corresponding to a defective physical column of the storage matrix, stores a data bit in a column of the …