Double polysilicon integrated circuit process
CA 1267825 C · Owner: Hogeboom, John Gordon · Inventors: Theriault, Robert Emile; Hogeboom, John Gordon
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
Abstract of the Disclosure, In d double polysilicon integrated circuit processing method a first level polysilicon is used for FET gate fabrication a, second level is used for interconnection and both levels are used in the fabrication of analog capacitors over field oxide regions. By the invention, capacitors are also fabricated in the FET device well by . implanting dopant through She second level polysilicon at the same time that dopant is implanted directly into other regions of the substrate to a greater depth and dopant level concentration so as to function as an FET source. The method is particularly adapted to fabricating DRAM memories.
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted April 17, 1990. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended April 17, 2007.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.