Programmable data path width in a programmable unit having plural levels of subinstruction sets

Abstract From the Canadian patent

A processing system including an arithmetic logic unit having various functional units. The system comprises a first level subinstruction storage means a second level, subinstruction storage means and a control register. The, first level subinstruction storage means contains first level subinstructions which include an address to the second level subinstruction storage means. The first level storage means also includes second level subinstructions which contain control signals. The second level subinstruction storage means contains other second level subinstructions which have control signals contained therein. The control register is coupled to the first level subinstruction storage means …