Integrated circuit manufacturing process
CA 1264870 C · Owner: Tremont, Peter L. · Inventors: Tremont, Peter L.; Ackermann, Arthur J.
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
A process is disclosed for manufacturing an integrated circuit in which multiple patterned layers of thin film materials are provided on a silicon wafer. The wafer is conditioned between the providing of layers after each etching step, by rinsing the item with R purified water solution containing at least .01 ppm ozone, preferably between .02 and .09 ppm ozone . -1-
Read the whole patent
Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted January 23, 1990. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended January 23, 2007.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.