Multiport memory and source arrangement for pixel information

Abstract From the Canadian patent

The present system includes in a preferred embodiment, a plurality of bit map memory units which together define a large bit map memory. For each bit map memory unit there is also included a mask means and four extended shift registers. The shift registers can be loaded in parallel with pixel information through bidirectional data transmission channels which include bidirectional mask means. The pixel information can be routed through said bidirectional mask means to different address locations or, to the same address location, with certain of the pixel bits removed by the mask means. The shift registers have both serial and parallel input and output mans and are clocked at different speeds …