Window borderline generating circuit for crt display

Abstract From the Canadian patent

The disclosure teaches a circuit for generating window, borderlines for a CRT display that is capable of, generating such borderlines with a simple hardware configuration. A window region defining signal is generated which takes a first state for a period corresponding to a desired window region and a second, state for a period not corresponding to the window region during scanning period of the screen of CRT display. Then the signal is delayed and the delayed signal and, said window region defining signal are exclusive-ORed to, provide a timing signal for generating borderlines of the window.