High performance memory utilizing pipelining techniques

Abstract From the Canadian patent

A novel memory system is disclosed which utilizes pipelining techniques to read data from a memory array and to write data to a memory array. More data may be read from the novel memory system within a, unit of time, relative to the amount of data which may be read from a conventional memory system during the unit of time. The novel memory system comprises a plurality of standard elements which include a memory array, including a plurality of rows and columns, a row decoder, a row driver, column sense amplifiers, and a column multiplexer. However the, novel memory system further includes latch circuits interposed between the row decoder and the row driver, between the row driver and the …