A method for correcting an error bit in a data word

Abstract From the Canadian patent

Abstract of the Disclosure A method and apparatus for correcting single bit errors in a data word stored in a first memory device without requiring the data word to include an error correction code includes a multi-stage dynamic shift register for dividing a data word by a polynomial during the time the data word is being written into the first memory device resulting in the generation of a remainder which is stored in a second memory device. When reading the data word from the first memory device the data word is again divided by the same polynomial. The remainder generated by the second division is compared with the remainder stored in the second memory device. If the remainders do not …