Method for forming an isolation region for electrically isolating elements

Abstract From the Canadian patent

A method for forming an isolation region having a submicron width thereof in a semiconductor substrate comprising the steps of: forming a metal or a metal silicide layer on the semiconductor substrate; then forming a resist layer on the metal or metal silicide layer; patterning the resist layer; selectively etching the metal or metal silicide layer and the semiconductor substrate by the reactive ion etching process using a mixture of chlorine-containing gas and oxygen gas to form a groove in the surface portion of the semiconductor substrate located around the edge of the resist layer; and forming an insulating layer in the groove.