Cmos integrated circuit with high frequency power bus arrangement

Abstract From the Canadian patent

A CMOS integrated circuit chip is designed to include a number of decoupling capacitors close to transistor cells in the chip so as to enable high frequency switching. The chip is formed on a substrate which includes a number of columns of wells of conductivity type opposite to that of the substrate. A number of columns of CMOS transistor pairs are formed in the substrate, with one transistor of each pair being formed in a well. Decoupling capacitance is provided by making power supply connections to the wells and substrate at a number of locations over the chip. These connections serve to reverse bias the well/substrate interface, thereby providing an associated capacitance which is …