V-mos device with self-aligned multiple electrodes

Abstract From the Canadian patent

V-MOS Device with Self-Aligned Multiple Electrodes, High density VMOSFET devices particularly single, transistor memory cells are provided by use of, series of simplified self-aligning process steps. Gate electrodes source/drain regions and source/, drain contacts are provided with the aid of an initial mask-less photoresist removal process in which a relatively thick layer of self-leveling photoresist is uniformly removed in order to define portions of a gate electrode within the recess of a V-groove. The gate electrode subsequently acts as a self-aligned mask to define implanted source/ drain regions also within the V-groove and to enable second level interconnecting metallurgy contacts …