Method of making fet
CA 1136290 A · Owner: Matsushita Electronics Corporation · Inventors: Teramoto, Iwao; Kano, Gota; Takagi, Hiromitsu
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
A method of making a junction gate field effect transistor with a very short gate length and good high frequency low noise, characteristics, the method comprising the steps of: forming on a silicon epitaxial layer of n-type conductivit-j a doped oxide film containing boron as an impurity to give p-type conductivity, forming a mask containing Si3N4 film and having a width larger than that of a gate region to be formed on said n-type epitaxial layer, etching said doped oxide film by utilizing said mask as an etching mask to expose the surface of said silicon crystal layer such that sides of the part of said doped oxide film covered by said mask are side-etched by a predetermined width …
Read the whole patent
Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted November 23, 1982. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended November 23, 1999.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.