Fault tolerant system for bubble memories

Abstract From the Canadian patent

A logic system is disclosed for using a memory device of the serial read type having redundant elements in excess of the nominal memory size and consists of a Programmable Read Only Memory having a defect map programmed into it with respect to the associated memory device a shift register of a prede-, termined length equivalent to the maximum number of allowable defects a multi-, plexer associated with the shift register a position counter for controlling, the multiplexer and finally, appropriate logic to control the system. This system is disclosed in connection with a bubble memory system of the field access major loop - minor loop type having extra minor loops. As defects are encountered …