Method of modifying electrical characteristics of mos devices using ion implantation
CA 1111147 A · Owner: Smc Standard Microsystems Corporation · Inventors: Richman, Paul
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
A method is disclosed for selectively modifying the electrical characteristics of MOS devices at a late stage in the fabrication process to form, for example, the "I" and "O" data locations of a ROM or to form, enhancement-and depletion-mode devices. In one embodiment of the method in addition to forming openings in the passivation layer to define location of bonding pads, additional openings are formed in that layer at locations at which a data bit of one of the two levels is to be formed. Subsequently an ion implantation is performed through the exposed underlying polysilicon gate structure to create an implantation layer at the channel regions of selected MOS devices, and thereby …
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted October 20, 1981. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended October 20, 1998.
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Timeline
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Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.