Variable symmetry multiphase clock generator

Abstract From the Canadian patent

The clock generator which is shown as being a part of, a data processor includes a recirculating shift register and gate combination for deriving a set of four clock phase signals from a master clock signal. The generator also includes two gates and a D flop which form sequential circuitry. The latter controls the shift register to impart a desired non symmetry to the clock signals and, to vary that symmetry, as necessary to minimize the clock cycle time and to maximize the processor operating speed. To this end the circuitry normally makes the clock pulse widths a minimum, consistent with the processor requirements, and, on demand, doubles the widths of only those clock pulses which are …