Dynamic mos memory with reduced propagation delay

Abstract From the Canadian patent

The present invention relates to an improved MOS memory structure. There is disclosed an array of memory cells of the three-device-per-bit type the array being, formed in rows and columns. Temporary storage cells are disclosed which are employed to receive and temporarily store inverted digital information from selected memory cells responsive to a READ signal. The inverted digital information is re-inverted upon restoration thereof into the selected memory cells, thus eliminating any need of accounting for the polarity or status of the data whereby, propagation delay time through the memory structure is reduced.