Data access circuit for a memory array

Abstract From the Canadian patent

Abstract of the Disclosure, A memory array having a plurality of intersecting, rows and columns stores digitized speech. Each row and, column intersection consists of a binary storage cell for storing one bit of digitized speech. Incoming digitized speech is loaded into columns of the memory array in a plurality of repetitive loading sequences each loading, sequence including; reading out the bits stored in successive rows of binary storage cells, replacing in each successive row of bits, a predetermined one of the bits in the read out row with a successive one of the bits of the digitized speech and writing each read out row of bits including the replaced bit back into the row. Multibit …