Clock gated digital data encoding circuit
CA 1073127 A · Owner: Spectradyne · Inventors: Briggs, Robert S. (Jr.); Winkelmann, Earl R.
Overview
Its claims, description and drawings are in the Canadian Patents Database.
Open the CIPO recordAbstract From the Canadian patent
CLOCK GATED DIGITAL DATA ENCODING CIRCUIT BY, EARL R. WINKELMANN AND ROBERT S. BRIGGS JR. "Abstract of the Disclosure", A digital data encoding circuit for use in a one-way transmission system utilizes three 8-bit multiplexers to generate and transmit a 64-bit message. Each bit in the message comprises a 4-chip or time slot, code, that includes an embedded clock therein. The encoding circuit repetitively generates the 64-bit coded message but only enables transmission of one message during periodically recurring intervals. In the event a priority message is sensed, the time between the intervals is reduced so that the rate of message transmission is increased.
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Listed from its CIPO record in Patent Yard's archive of Canadian patents past their term. Its claims, description and drawings are in the CIPO record and on Google Patents, and the Claude kit works from them.
Why it's free to use
- Granted March 4, 1980. A Canadian patent filed before October 1, 1989 lasted 17 years from grant, so its term ended March 4, 1997.
- We check Canadian rights only. A patent in its family in another country could still be in force: check its family on Google Patents.
Timeline
Timeline From CIPO dates
Sources & verification
Official CIPO records
Everything on this page comes from the CIPO record linked above. Contains information licensed under the Open Government Licence – Canada.