Method of generating addresses to a paged memory

Abstract From the Canadian patent

Abstract of the Disclosure, An input-output processing system which performs communication and control functions in a larger data processing system includes a processor for address development to paged memory and program instruction execution for I/O command sequences. In generating memory addresses instructions, are provided an address syllable which references a processor register as an index and a displacement. The contents of the register and the displacement define a memory effective address. A scratchpad memory is provided for storing page table words in levels corresponding to priority levels of processes and, stored page table words are accessed according to the least significant …